Please use this identifier to cite or link to this item: https://hdl.handle.net/2440/112124
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dc.contributor.authorGao, Y.-
dc.contributor.authorMa, H.-
dc.contributor.authorAl-Sarawi, S.-
dc.contributor.authorAbbott, D.-
dc.contributor.authorRanasinghe, D.-
dc.date.issued2018-
dc.identifier.citationIEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems, 2018; 37(5):1104-1108-
dc.identifier.issn0278-0070-
dc.identifier.issn1937-4151-
dc.identifier.urihttp://hdl.handle.net/2440/112124-
dc.descriptionDate of publication August 15, 2017; date of current version April 19, 2018.-
dc.description.abstractExisting strong controlled physical unclonable function (PUF) designs are built to resist modeling attacks and they deal with noisy PUF responses by exploiting error correction logic. These designs are burdened by the costs of the error correction logic and information shown to leak through the associated helper data for assisting error corrections; leaving the design vulnerable to fault attacks or reliabilitybased attacks. We present a hybrid PUF–finite state machine (PUF-FSM) construction to realize a controlled strong PUF. The PUF-FSM design removes the need for error correction logic and related computation, storage of the helper data and loading it on-chip by only employing error-free responses judiciously determined on demand in the absence of the underlying PUF—an Arbiter PUF—with a large challenge response pair space. The PUF-FSM demonstrates improved security, especially to reliability-based attacks and is able to support a range of applications from authentication to more advanced cryptographic applications built upon shared keys. We experimentally validate the practicability of the PUF-FSM.-
dc.description.statementofresponsibilityYansong Gao, Hua Ma, Said F. Al-Sarawi, Derek Abbott, and Damith C. Ranasinghe-
dc.language.isoen-
dc.publisherIEEE-
dc.rights© 2017 IEEE-
dc.source.urihttp://dx.doi.org/10.1109/tcad.2017.2740297-
dc.subjectArbiter physical unclonable function (APUF); error-free responses; fault attacks; modeling attacks; physical uncloanble function (PUF); statistical model-
dc.titlePUF-FSM: A controlled strong PUF-
dc.typeJournal article-
dc.identifier.doi10.1109/TCAD.2017.2740297-
dc.relation.granthttp://purl.org/au-research/grants/arc/DP140103448-
pubs.publication-statusPublished-
dc.identifier.orcidAl-Sarawi, S. [0000-0002-3242-8197]-
dc.identifier.orcidAbbott, D. [0000-0002-0945-2674]-
dc.identifier.orcidRanasinghe, D. [0000-0002-2008-9255]-
Appears in Collections:Aurora harvest 8
Electrical and Electronic Engineering publications

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