Adelaide Research & Scholarship
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| Logical effort based design exploration of 64-bit adders using a mixed dynamic-CMOS/threshold-logic approach(legacy) | 117 |
| Logical effort based design exploration of 64-bit adders using a mixed dynamic-CMOS/threshold-logic approach(legacy) | 84 |
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| November 2023 | December 2023 | January 2024 | February 2024 | March 2024 | April 2024 | May 2024 | |
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| Logical effort based design exploration of 64-bit adders using a mixed dynamic-CMOS/threshold-logic approach | 4 | 6 | 8 | 0 | 3 | 5 | 0 |
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| hdl_40078.pdf(legacy) | 341 |
| hdl_40078.pdf | 223 |
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