Impact of CT saturation on phasor measurement algorithms: Uncertainty and sensitivity study

Abstract

An important element of any Intelligent Electronic Device (IED) is the phasor measurement algorithm. The role of such algorithm is to extract fundamental frequency phasors from signals measured on secondary winding of a current transformer (CT). As a result of faults and switching in primary network we can expect to have current signals with high amplitude of exponentially decaying DC. In these conditions, the measured current signal can also be influenced by high remanent flux in the CT core. These factors may lead to different degrees of CT saturation. During saturation, the CT output is no longer accurately representing the primary current signal. Consequently, the implemented measurement and protection functions in IEDs are affected. This paper investigates the sensitivity of the measurement algorithms implemented in IEDs, in particular Discrete Fourier Transform (DFT) and Two-Sample algorithms, to factors which cause CT to saturate. Impact analysis of the following uncertain factors will be presented: amplitude and time constant of the asymmetrical fault current, and remanent flux in CT core. The study has been performed at three different CT burden values. Uncertainty of the measurement algorithms during CT saturation was assessed using mean, standard deviation and bounds of measurement error. Uncertainty results show that higher measurement bias is encountered at higher burden. Sensitivity results show that performance of the full-cycle DFT measurement algorithm is the most sensitive to the amplitude of asymmetrical fault current at all burden values. Two-Sample measurement algorithm shows similar sensitivity result only at lower burden values. However, at higher burden the algorithm is also sensitive to remanent flux.