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Please use this identifier to cite or link to this item: https://hdl.handle.net/2440/70775
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dc.contributor.authorRahimiazghadi, S.-
dc.contributor.authorKavehei, O.-
dc.contributor.authorAl-Sarawi, S.-
dc.contributor.authorIannella, N.-
dc.contributor.authorAbbott, D.-
dc.date.issued2011-
dc.identifier.citationProceedings of the 21st Annual Conference of the Japanese Neural Network Society (JNNS), 15-17 December, 2011, Okinawa, Japan: pp.1-2-
dc.identifier.urihttp://hdl.handle.net/2440/70775-
dc.description.abstractIn this paper, we present a new triplet based STDP VLSI implementation, based on a previous published pair-based STDP circuit [1]. Simulation results illustrate that the proposed VLSI circuit can reproduce similar results to those observed in various physiological STDP experiments [2–4], while the traditional pair-based VLSI implementation fails to do so [2]-
dc.description.statementofresponsibilityMostafa Rahimi Azghadi, Omid Kavehei, Said Al-Sarawi, Nicolangelo Iannella and Derek Abbott-
dc.language.isoen-
dc.publisherJNNS-
dc.rightsCopyright status unknown-
dc.subjectSynaptic plasticity-
dc.subjectspike timing dependentplasticity-
dc.subjectspike triplet-
dc.subjectVLSI Implementation-
dc.titleTriplet-based spike-timing dependent plasticity in silicon-
dc.typeConference paper-
dc.contributor.conferenceAnnual Conference of the Japanese Neural Network Society (21st : 2011 : Okinawa, Japan)-
dc.publisher.placeonline-
pubs.publication-statusPublished-
dc.identifier.orcidAl-Sarawi, S. [0000-0002-3242-8197]-
dc.identifier.orcidAbbott, D. [0000-0002-0945-2674]-
Appears in Collections:Aurora harvest 5
Electrical and Electronic Engineering publications

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