Please use this identifier to cite or link to this item: https://hdl.handle.net/2440/106068
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Type: Journal article
Title: A new approach on design of a digital phase-locked loop
Author: Ahn, C.
Shi, P.
You, S.
Citation: IEEE Signal Processing Letters, 2016; 23(5):600-604
Publisher: Institute of Electrical and Electronics Engineers
Issue Date: 2016
ISSN: 1070-9908
1558-2361
Statement of
Responsibility: 
Choon Ki Ahn, IEEE, Peng Shi, Sung Hyun You
Abstract: In this letter, we propose a new approach to the design of a digital phase-locked loop (DPLL) with a finite impulse response (FIR) structure, deadbeat property, and H∞ performance. This DPLL is called the deadbeat H∞ FIR DPLL (DHFDPLL). The proposed DHFDPLL ensures the H∞ performance against incorrect information on noise and has intrinsic robustness against quantization effects because of the FIR structure. Demonstrative simulations are provided to show that the DHFDPLL exhibits excellent robustness against effects of incorrect noise and quantization compared with the existing DPLLs.
Rights: © 2016 IEEE.
DOI: 10.1109/LSP.2016.2542291
Published version: http://dx.doi.org/10.1109/lsp.2016.2542291
Appears in Collections:Aurora harvest 8
Electrical and Electronic Engineering publications

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