Hardware mapping of critical paths of a GaAs core processor for solid modelling accelerator / by Song Cui.

Cui, Song

Please use this identifier to cite or link to this item: https://hdl.handle.net/2440/18735

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DC Field	Value	Language
dc.contributor.author	Cui, Song	en
dc.date.issued	1996	en
dc.identifier.uri	http://hdl.handle.net/2440/18735	-
dc.description	Bibliography: leaves 200-207.	en
dc.description	xi, 207 leaves : ill. ; 20 cm.	en
dc.description.abstract	The aim of this thesis is to design and implement the hardware mapping of critical paths of a GaAs Core Processor for a Solid Modelling Accelerator. The solid modelling accelerator is designed using GaAs/CMOS/B:CMOS unified technology. High speed GaAs technology is used in the core processor to deal with floating point intensive calculations, while CMOS technology is used where high speed outputs are not required.	en
dc.format.extent	181297 bytes	en
dc.format.mimetype	application/pdf	en
dc.language.iso	en	en
dc.subject.lcsh	Microprocessors Design and construction.	en
dc.subject.lcsh	Gallium arsenide semiconductors.	en
dc.subject.lcsh	Geometry, Solid.	en
dc.subject.lcsh	Logic circuits.	en
dc.subject.lcsh	CAD/CAM systems.	en
dc.title	Hardware mapping of critical paths of a GaAs core processor for solid modelling accelerator / by Song Cui.	en
dc.type	Thesis	en
dc.contributor.school	Dept. of Electrical and Electronic Engineering	en
dc.provenance	This electronic version is made publicly available by the University of Adelaide in accordance with its open access policy for student theses. Copyright in this thesis remains with the author. This thesis may incorporate third party material which has been used by the author pursuant to Fair Dealing exception. If you are the author of this thesis and do not wish it to be made publicly available or If you are the owner of any included third party copyright material you wish to be removed from this electronic version, please complete the take down form located at: http://www.adelaide.edu.au/legals	en
dc.description.dissertation	Thesis (Ph.D.)--University of Adelaide, Dept. of Electrical and Electronic Engineering, 1996	en
Appears in Collections:	Research Theses

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